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SPDES  -- Linear S Parameter design

BODEMLT - Linear SYSTEM design

NETAZ - Linear AC network analysis

NETMATCHs1 - LC/strip line matching network design - minimize VSWR

navLOGIC - Ditgital functional and timing simulation - plot outputs

navCIRCUIT - non linear circuit analysis

navCHIP - A meun driven design tool used for rep;resenting the physical layout of the design in the Caltech Intermediate Form (.CIF) - output is CIF file

navEXT - Program will recognize different elements within a CMOS ciruit. Input is a .SIM type simulation file.

navTEXT - complete hypertext informational system

                   Can be interfaces to any application

                  Based on HyperCard or Toolbook or Web implementation